Texas Instruments OMAP5912 Reference Manual page 1502

USB OTG Controller
Table 66. HMC_PADEN: USB Signal Multiplexing Control Source (Continued)
HMC_PADEN
1 HMC_MODE
HMC_TLLATTACH
HMC_TLLSPEED
UHOST_EN
Table 67. OTG Control Register (OTG_CTRL)
Bit Name
31:21 Reserved
20 ASESSVLD
19 BSESSEND
210 Universal Serial Bus (USB)
Value
MOD_CONF_CTRL_0.
CONF_MOD_USB_HOST_HHC_HMC_MODE_R
MOD_CONF_CTRL_0.
CONF_MOD_USB_HOST_HHC_HMC_TLL_ATTACH_R
MOD_CONF_CTRL_0.
CONF_MOD_USB_HOST_HHC_HMC_TLL_SPEED_R
MOD_CONF_CTRL_0.CONF_MOD_USB_HOST_HHC_UHOST_
EN_R
This register is cleared 0 by soft reset or hardware reset.
For best software compatibility with future devices, it is recommended that
system software set this register to 0.
Description
Reserved
Current A-device session valid value. When OTG is enabled (OTG_EN =
1), this bit must be programmed to reflect the OTG transceiver VBUS
voltage comparator that compares against V
above V
A_SESS_VLD
V , ASESSVLD should be set to 0. This information is only
A_SESS_VLD
relevant when connected as an A-device (OTG_CTRL.ID = 0) and OTG is
enabled (OTG_EN = 1).
0: VBUS voltage is below V
1: VBUS voltage is above V
This register is cleared 0x0 by soft reset or hardware reset.
Current B-device session end value. When OTG is enabled (OTG_EN = 1),
this bit must be programmed to reflect the OTG transceiver VBUS voltage
comparator that compares against V
V
B_SESS_END
V
B_SESS_END
relevant when connected as B-device (OTG_CTRL.ID = 1) and OTG is
enabled (OTG_EN = 1).
0: VBUS voltage is above V
1: VBUS voltage is below V
This register is cleared 0x0 by soft reset or hardware reset.
Source
, ASESSVLD must be set to 1. When VBUS is below
A_SESS_VLD
A_SESS_VLD
B_SESS_END
, BSESSEND must be set to 1. When VBUS is above
, BSESSEND must be set to 0. This information is only
B_SESS_END
B_SESS_END
. When VBUS is
A_SESS_VLD
.
.
. When VBUS is below
.
.
SPRU761A