Texas Instruments OMAP5912 Reference Manual page 1488

Multimedia processor device overview and architecture
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USB OTG Controller
Table 57. OTG Controller Registers (Continued)
Name
OTG_IRQ_EN
OTG_IRQ_SRC
OTG_OUTCTRL
OTG_TEST
Reserved
VC
Table 58. OTG Revision Number Register (OTG_REV)
Bit
Name
31:8
7:0
OTG_REV_NB
196
Universal Serial Bus (USB)
Description
OTG interrupt enable
OTG interrupt source identification
OTG interrupt source identification
OTG interrupt source identification
Reserved
USB vendor code
All bits defined as reserved must be written by software with 0s, for preserving
future compatibility. When read, any reserved bit returns 0. It is good software
practice to use complete mask patterns for setting or testing bit fields
individually within a register.
Description
OTG revision number: this 8-bit field indicates the revision number of the
current OTG controller, in binary-coded digital (BCD), with the major
revision number in bits 7−4, and the minor revision number in bits 3−0.
This value is hardware fixed.
0x10: Revision 1.0
0x11: Revision 1.1
0x12: Revision 1.2
0x13: Revision 1.3
0x14: Revision 1.4
0x15: Revision 1.5
0x16: Revision 1.6
....
0xF2: Revision 15.2
This read-only register reflects the OTG controller revision number.
R/W
Address
R/W
FFFB:0410h
R/W
FFFB:0414h
R/W
FFFB:0418h
R/W
FFFB:0420h
None
FFFB:0424h to
FFFB:04FBh
R/O
FFFB:04FCh
SPRU761A

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