Texas Instruments OMAP5912 Reference Manual page 1507

Multimedia processor device overview and architecture
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Table 67. OTG Control Register (OTG_CTRL) (Continued)
Bit
Name
2
OTG_PD_VBUS
1
OTG_PU_VBUS
0
OTG_PU_ID
SPRU761A
Description
VBUS pulldown enable. When OTG is enabled (OTG_EN = 1), this
read-only bit indicates whether the OTG transceiver is to discharge VBUS
when generating SRP. Driving VBUS is requested only when OMAP5912
acts as a default-A device and an OTG session is needed or is in progress.
When OTG is disabled (OTG_EN = 0), this bit has no meaning. Discharge
of VBUS is requested only when OMAP5912 is acting as a default-B
device, an OTG session needs to be requested, and
OTG_SYSCON_2.SRP_GPDVBUS = 1.
0: OTG transceiver does not discharge VBUS.
1: OTG transceiver discharges VBUS.
This bit is cleared 0 by soft reset or hardware reset.
This bit can be polled when the OTG_IRQ_EN:OPRT_CHG_EN = 0. When
OTG_IRQ_EN.OPRT_CHG_EN = 1 and OTG_IRQ_SRC:OPRT_CHG =1,
OTG_PD_VBUS retains its value until after OTG_IRQ_SRC.OPRT_CHG
is cleared.
VBUS pullup enable. When OTG is enabled (OTG_EN = 1), this read-only
bit indicates whether the OTG transceiver charges VBUS. Charging VBUS
is only used when OMAP5912 acts as a default-B device and is performing
SRP. When OTG is disabled (OTG_EN = 0), this bit has no meaning.
0: OTG transceiver does not charge VBUS.
1: OTG transceiver charges VBUS.
This bit is cleared 0 by soft reset or hardware reset.
This bit can be polled when the OTG_IRQ_EN:OPRT_CHG_EN = 0. When
OTG_IRQ_EN.OPRT_CHG_EN = 1 and OTG_IRQ_SRC:OPRT_CHG =1,
OTG_DRV_VBUS retains its value until after OTG_IRQ_SRC.OPRT_CHG
is cleared.
ID signal pullup enable. When OTG is enabled (OTG_EN = 1), this
read-only bit indicates whether the OTG transceiver applies a pullup to the
ID pin to assist in detection of the ID pin level. System software for
implementations using typical OTG transceivers with I
this bit.
0: OTG transceiver does not apply a pullup to ID.
1: OTG transceiver applies a pullup to ID.
This bit is cleared 0 by soft reset or hardware reset.
This register can be used for polling when the
OTG_IRQ_EN:OPRT_CHG_EN is cleared 0. Otherwise, this information is
frozen when the interrupt status OTG_IRQ_SRC:OPRT_CHG is active 1.
USB OTG Controller
2
C interfaces ignore
Universal Serial Bus (USB)
215

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