Texas Instruments OMAP5912 Reference Manual page 1487

4.1 OTG Controller Features
4.2 OTG Controller Registers
Table 57. OTG Controller Registers
Name
OTG_REV
OTG_SYSCON_1
OTG_SYSCON_2
OTG_CTRL
SPRU761A
The main features of the OMAP5912 USB OTG controller include:
-
USB specification version 2.0 compatibility
-
When acting as an OTG a-peripheral or an OTG b-peripheral: a 12M
bit-per-second communication link with configurable data transfer type,
data buffer size, single- or double-buffering for each endpoint, and up to
three IN endpoints using DMA and up to three OUT endpoints using DMA
to support streaming USB data.
-
When acting as an OTG a-host or an OTG b-host: an OHCI Rev
1.0-compatible USB host controller capable of USB full-speed (12M
bits-per-second)
communication.
These are basic features of the OMAP5912 USB device controller and the
OMAP5912 USB host controller. Additional OTG-specific features provided by
the OMAP5912 OTG controller include:
-
Control and status logic that allows implementation of an OTG dual-role
device (DRD)
-
Ability to implement an OTG peripheral-only device (that is, one that
cannot act as an OTG A-device)
-
Support for generation and detection of the OTG host negation protocol
(HNP) and both types of OTG session request protocol
-
Support for OTG transceivers compatible with the OTG working group
OTG transceiver specification
Table 57 lists the 32-bit OTG controller registers. Table 58 through Table 72
describe the register bits.
Description
OTG controller revision number
OTG system configuration group 1
OTG system configuration group 2
OTG control
and USB low-speed
Universal Serial Bus (USB)
USB OTG Controller
(1.5M bits-per-second)
R/W Address
R/O FFFB:0400h
R/W FFFB:0404h
R/W FFFB:0408h
R/W FFFB:040Ch
195