Block Write Access - STMicroelectronics SPC572L series Reference Manual

e200z215An3 Nexus 3 Module
Access Address Register (RWA). The nex_ahb_start output will be asserted during the first
clock of the address phase of the transfer. When the access has completed, Nexus clears
the AC and DV bits in the RWCS Register. If the access has completed without error,
(ERR=1'b0), Nexus asserts the nex_rdy_b pin (see
the ERR bit in the RWCS Register. Otherwise, if the access completes with an error,
the nex_err_b pin will be asserted and the ERR bit will be set to indicate an error has
occurred, and the nex_rdy_b pin will not be asserted. Once DV has been cleared, this
indicates that the device is ready for the next access, or that an error has occurred.
Note: Only the nex_ahb_start, nex_rdy_b, and nex_err_b pins as well as the AC, DV, and ERR
bits within the RWCS provide Read/Write Access status to the external development tool.
66.17.2

Block write access

1. For a block write access, follow Steps 1, 2, and 3 outlined in
write access
the CNT field in the RWCS Register.
2. The Nexus block will then arbitrate for the AHB system bus and transfer the first data
value from the RWD Register to the memory mapped address in the Read/Write
Access Address Register (RWA). The nex_ahb_start output will be asserted during
the first clock of the address phase of the transfer. When the transfer has completed
without error, the address from the RWA Register is incremented to the next word size
(specified in the SZ field), the number from the CNT field is decremented, and the
nex_rdy_b pin is asserted. If the access has completed without error, Nexus clears the
ERR and DV bits in the RWCS Register, otherwise the ERR bit will be set and the DV
bit will be cleared to indicate an error has occurred, the nex_err_b pin is asserted, the
block transfer is aborted, and the AC bit in the RWCS register is cleared. Once DV has
been cleared, this indicates that the device is ready for the next access in the block
transfer, or an error has occurred.
3. If AC has not been cleared due to an error, repeat Step 3 in
write access
the RWCS will be cleared to indicate the end of the block write access.
Note: The actual RWA value as well as the CNT field within the RWCS are not changed when
executing a block write access. The original values can be read by the external
development tool at any time.
1970/2058
to initialize the registers, but using a value greater than one (14'h0001) for
until the internal CNT value is zero (0). When this occurs, the AC bit within
DocID027809 Rev 4
Table 1110 for details) and clears
Section 66.17.1, Single
Section 66.17.1, Single
RM0400