Dtm Operation - STMicroelectronics SPC572L series Reference Manual

RM0400
Exception Condition
Exit from Low Power/Debug
Queue Overrun
Periodic Data Trace Sync.
Event In
Collision Priority
66.13.3

DTM operation

66.13.3.1 Data Trace windowing
Data Write/Read Messages are enabled via the RWT field in the Data Trace Control
Register (DTC) for each DTM channel. Data Trace windowing is achieved via the address
range defined by the DTEA and DTSA Registers and by the RC field in the DTC register. All
CPU initiated read/write accesses that fall inside or outside these address ranges, as
programmed, are candidates to be traced.
66.13.3.2 Data Access / Instruction Access Data Tracing
The Nexus3 module is capable of tracing either instruction access data or data access data
and can be configured for either type of data trace by setting the DI1 field within the Data
Trace Control Register. This setting applies to all DTM channels.
66.13.3.3 Data Trace filtering
Data Trace filtering is available base on the settings of MSR
66.13.3.4 Bus cycle special cases
Bus cycle aborted
Bus cycle with data error (TEA)
Table 1105. Data Trace Exception summary(Continued)
Upon exit from a Low Power mode or Debug mode the next Data Trace Message
will be converted to a Data Write/Read with Sync. Message.
An Error Message occurs when a new message cannot be queued due to the
message queue being full. The FIFO will discard messages until it has completely
emptied the queue. Once emptied, an Error Message will be queued. The error
encoding will indicate which type(s) of messages attempted to be queued while the
FIFO was being emptied. The next DTM message in the queue will be a Data
Write/Read w/ Sync. Message.
A forced synchronization occurs periodically after 255 Data Trace Messages have
been queued. A Data Write/Read w/ Sync. Message is queued. The periodic data
trace message counter then resets.
If the Nexus module is enabled, a nex_evti_b assertion initiates a Data Trace
Write/Read w/ Sync. Message upon the next data write/read (if Data Trace is
enabled and the EIC bits of the DC1 Register have enabled this feature).
All Messages have the following priority: Instruction 0 (WPM → DQM →
→ OTM → BTM → DTM)→ Instruction1 (WPM → DQM → OTM →
PCM
PIDMSG
BTM → DTM), where instruction0 is the oldest instruction. A DTM Message that
attempts to enter the queue at the same time as three other higher priority
messages will be lost. A subsequent read/write will queue a Data Trace Read/Write
w/ Sync. Message.
Table 1106. Bus cycle special cases
Special case
(1)
DocID027809 Rev 4
e200z215An3 Nexus 3 Module
Exception Handling
and DC4
PMM
Action
Cycle ignored
Data Trace Message discarded
.
DTMARK
1963/2058
1982