Texas Instruments OMAP5912 Reference Manual page 1526

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

USB OTG Controller
Figure 52.
OTG Transceiver I
234
Universal Serial Bus (USB)
interrupt handlers block other processor software operations until the handler
completes. System software must implement a non-blocking mechanism,
such as a message-based system, to allow the I
outside of the OTG interrupt handler, but then allow updating of the OTG
controller OTG_CTRL.OTG_PU bit on completion of the I
2
C Control Handler
The OTG transceiver signals the need for a status transfer from the OTG
transceiver to the OTG controller, using an interrupt output signal. This
interrupt is generally connected to an OMAP5912 GPIO input pin, and that pin
is configured to provide an interrupt to the MPU Level 2 interrupt controller.
Figure 53 shows the basic GPIO interrupt handler functionality required.
2
C operations to be completed
Non-blocking OTG transceiver
control update
Read OTG_CTRL[20:16]
Convert OTG_CTRL values into
appropriate I 2 C transfer
operations
Send I 2 C operations to
configure the OTG
transceiver (non-blocking)
and set OTG_CTRL.OTG_PU
to 1 at completion of the I 2 C
operations
End of non-blocking OTG
transceiver control update
2
C operations.
SPRU761A

Advertisement

Table of Contents
loading

Table of Contents