Texas Instruments OMAP5912 Reference Manual page 1666

4.3.1 Example of Overwrite Condition
Figure 28. Data in the McBSP Transmitter Overwritten and Thus Not Transmitted
CLKX
FSX
A1
DX
XRDY
4.3.2 Preventing Overwrites
4.4 Underflow in the Transmitter
SPRU762B
Figure 28 shows what happens if the data in DXR1 is overwritten before being
transmitted. Initially, DXR1 is loaded with data C. A subsequent write to DXR1
overwrites C with D before C is copied to XSR1. Thus, C is never transmitted
on DX.
Á Á Á Á
A0 B7 B6
Write to DXR1(C)
You can prevent CPU overwrites by making the CPU:
Poll for XRDY = 1 in SPCR2 before writing to the DXR(s). XRDY is set
-
when data is copied from DXR1 to XSR1 and is cleared when new data
is written to DXR1.
Wait for a transmit interrupt (XINT) before writing to the DXR(s). When
-
XINTM = 00b in SPCR2, the transmitter sends XINT to the CPU each time
XRDY is set.
You can prevent DMA overwrites by synchronizing DMA transfers to the
transmit synchronization event XEVT. The transmitter sends an XEVT signal
each time XRDY is set.
The McBSP indicates a transmitter empty (or underflow) condition by clearing
the XEMPTY bit in SPCR2. Either of the following events activates XEMPTY
(XEMPTY = 0):
DXR1 has not been loaded since the last DXR-to-XSR copy, and all bits
-
of the data word in the XSR(s) have been shifted out on the DX pin.
The transmitter is reset (by forcing XRST = 0 in SPCR2, or by an
-
OMAP5912 reset) and is then restarted.
In the underflow condition, the transmitter continues to transmit the old data
that is in the DXR(s) for every new transmit frame-synchronization signal until
a new value is loaded into DXR1 by the CPU or the DMA controller.
McBSP Exception/Error Conditions
Á Á Á Á Á Á Á Á
B5 B4 B3 B2 B1
Write to DXR1(D) DXR1 to XSR1 Copy(D)
Multichannel Buffered Serial Ports (McBSPs)
B0 D7 D6
Write to DXR1(E)
D5
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