Texas Instruments OMAP5912 Reference Manual page 1662

Multimedia processor device overview and architecture
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Figure 24.
Overrun Prevented in the McBSP Receiver
CLKR
FSR
Á
A1
A0
DR
Á
RRDY
RFULL
4.2
Unexpected Receive Frame-Synchronization Pulse
4.2.1
Possible Responses to Receive Frame-Synchronization Pulses
SPRU762B
Á
B7
B6
B5
B4
B3
Á
RBR1 to DRR1 copy(A)
No read From DRR1(A)
Section 4.2.1 shows how the McBSP responds to any receive frame-synchro-
nization pulses, including an unexpected pulse. Sections 4.2.2 and 4.2.3 show
an example of a frame-synchronization error and an example of how to prevent
such an error, respectively.
Figure 25 shows the decision tree that the receiver uses to handle all incoming
frame-synchronization pulses. The figure assumes that the receiver has been
started (RRST = 1 in SPCR1). Case 3 in the figure is the case in which an error
occurs.
McBSP Exception/Error Conditions
Á Á
Á
B2
B1
B0
C7
C6
Á Á
Á
No RBR1 to DRR1 copy(B)
Multichannel Buffered Serial Ports (McBSPs)
Á
C5
C4
C3
C2
C1
C0
RBR1 to DRR1(B)
Á
Read from DRR1(A)
51

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