Texas Instruments OMAP5912 Reference Manual page 1621

Multimedia processor device overview and architecture

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Table of Contents

13 McBSP Registers

13.1 Data Receive Registers (DRR2 and DRR1)

13.1.1 Data Travel From Data Receive Pins to the Registers

13.2 Data Transmit Registers (DXR2 and DXR1)

13.2.1 Data Travel From Registers to Data Transmit (DX) Pins

13.3 Serial Port Control Registers (SPCR1 and SPCR2)

13.4 Receive Control Registers (RCR1 and RCR2)

13.5 Transmit Control Registers (XCR1 and XCR2)

13.6 Sample Rate Generator Registers (SRGR1 and SRGR2)

13.7 Multichannel Control Registers (MCR1 and MCR2)

13.8 Pin Control Register (PCR)

13.9 Receive Channel Enable Registers (RCERA, RCERB, RCERC, RCERD, RCERE,

RCERF, RCERG, RCERH)

13.9.1 RCERs Used in the Receive Multichannel Selection Mode

13.10 Transmit Channel Enable Registers (XCERA, XCERB, XCERC, XCERD, XCERE,

XCERF, XCERG, XCERH)

13.10.1 XCERs Used in a Transmit Multichannel Selection Mode

14 McBSP Register Worksheet

14.1 General Control Registers

14.2 Multichannel Selection Control Registers

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Chapters

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