Texas Instruments OMAP5912 Reference Manual page 1611

Multimedia processor device overview and architecture
Hide thumbs Also See for OMAP5912:
Table of Contents

Advertisement

Non−ISO IN transactions 115
non−ISO/non−control IN endpoint TX
interrupt handler 171
non−ISO/non−control OUT endpoint RX
interrupt handler 168
Non−ISO/non−setup OUT transactions 110
note on device interrupts 145
parsing general interrupts 146
parsing non−ISO endpoint specific interrupt 166
power management 192
preparing for transfers 142
registers 68
reset interrupt handler 163
setup interrupt handler 148
SOF interrupt handler 172
summary of interrupts 176
suspend/resume interrupt handler 165
USB host controller 19
access to system memory 63
cache coherency in OHCI data 64
clock control 66
differences from OHCI specification for USB 22
hardware reset 66
implementation of OHCI specification for
USB 23
NULL pointers 65
OCPI bus 65
SPRU761A
OCPI bus addressing 64
OCPI clocking 68
OCPI registers 66
OHCI data structure pointers 64
OHCI interrupts 61
OHCI reset 67
open interface functionality 22
physical addressing 63
power management 67
registers 25
registers, reset, and clocking 61
reserved registers and bit fields 60
USB OTG controller 194
conflicts between USB signal and top level
multiplexing 313
external connectivity 264
features 195
function connectivity with USB transceivers 288
hardware considerations 313
host connectivity with USB transceivers 274
pin connectivity with signal multiplexing 309
pin multiplexing 243
registers 195
selecting/configuring USB connectivity 244
transceiver signaling types 260
transceiverless connection using link 302
USB overview 19
Index
Index
319

Advertisement

Table of Contents
loading

Table of Contents