Texas Instruments OMAP5912 Reference Manual page 1669

Multimedia processor device overview and architecture
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McBSP Exception/Error Conditions
Figure 31.
Possible Responses to Transmit Frame-Synchronization Pulses
58
Multichannel Buffered Serial Ports (McBSPs)
Transmit frame-sync
pulse occurs.
Unexpected
frame-sync
XFIG=1
Case 1:
With frame ignore
ignore frame pulse.
Transmit stays
running.
Any one of three cases can occur:
Case 1: Unexpected internal FSX pulses with XFIG = 1 in XCR2. Transmit
-
frame-synchronization pulses are ignored, and the transmission
continues.
Case 2: Normal serial port transmission. Transmission continues normally
-
because the frame-synchronization pulse is not unexpected. There are
two possible reasons why a transmit operations might not be in progress
when the pulse occurs:
This FSX pulse is the first after the transmitter is enabled (XRST = 1).
The serial port is in the interpacket intervals. The programmed data delay
for transmission (programmed with the XDATDLY bits of XCR2) may start
during these interpacket intervals before the first bit of the previous word is
transmitted. Thus, at maximum packet frequency, frame synchronization
can still be received 0 to 2 clock cycles before the first bit of the synchro-
nized frame.
No
pulse
?
Yes
No
?
Yes
Case 2:
Normal transmission.
Start new transmit.
Case 3:
Without frame ignore
abort transfer.
Set XSYNCERR.
Restart current
transfer.
SPRU762B

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