Texas Instruments OMAP5912 Reference Manual page 1581

Multimedia processor device overview and architecture
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Pin Group 0 USB Device
Figure 76.
USB Device Connections Using OMAP5912 Integrated USB Transceiver
U1
USB.PUEN/USB.PUDIS
USB.DP
USB.DM
GPIO0/USB.VBUS
OMAP5912
SPRU761A
USB_PULLUP
VBUS_DETECT
R1, R2
27 Ohm 5%
Optional weak pulldown (see text)
R3, R4
R5
1.5K Ohm 5%
U1
OMAP5912
U2
Transient suppressor, like SN65220, SN65240, or SN75240
U3
Level shifter
J1
USB type-B receptacle or USB mini-B receptacle
Proper initialization of the OMAP5912 to support this mode of operation
requires proper setting of the top-level multiplexing for USB.DP and USB.DM
(see Table 74) and selection of an HMC_MODE value that routes the USB
device controller to pin group 0 (see Table 73). OTG_SYSCON_1.
USB0.TRX_MODE must be set to 3 to allow proper operation of the integrated
USB transceiver.
When OTG_SYSCON_2.OTG_PADEN is 1, the status of GPIO0/USB.VBUS
is automatically provided to the USB device controller via hardware
mechanisms. When OTG_SYSCON_2.OTG_PADEN is 0, the USB device
controller only sees the VBUS status from the software-controlled register
OTG_CTRL.BSESSVLD bit. In this case, software must monitor the
VBUS_DETECT signal (using GPIO0 if wired as shown), and update
OTG_CTRL.BSESSVLD whenever the VBUS_DETECT signal changes.
R5
R1
U2
Transient
suppressor
R2
R3
R4
U3
Level shifter
Universal Serial Bus (USB)
USB OTG Controller
J1
D+
D−
VBUS
289

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