Texas Instruments OMAP5912 Reference Manual page 1604

Multimedia processor device overview and architecture
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USB OTG Controller
UART1 on Pin Group 0
Figure 91.
UART1 on USB Pin Group 0
UART1
OMAP5912
312
Universal Serial Bus (USB)
This mode of operation implements only one I
internally combines ALTSCL and SCL, and ALTSDA and SDA. This means
that it is not possible to implement I
both links.
OMAP5912 supports a mode in which the OMAP5912 UART1.TX and
UART1.RX signals are brought out via USB pin group 0 pins. In this mode of
operation, top-level pin multiplexing is configured to provide the RX input on
USB.DP/UART1.RX and provide the TX output on USB.DM/UART1.TX. This
is configured using the USB_TRANSCEIVER_CTRL.CONF_USB0 register
(see
Figure
91).
USB_TRANSCEIVER_CTRL.CONF_USB0_ISOLATE to 1 to ensure that the
UART1 signals have no effect on the OMAP5912 USB controllers.
U1
USB.DP/RX1
USB.DM/TX1
2
2
C slaves with identical I
When
using
U2
RX1
TX1
RS232
transceiver
U1
OMAP5912
U2
RS232 transceiver
RS232 connector
J1
C controller. OMAP5912
2
C addresses on
this
mode,
J1
SPRU761A
set

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