Texas Instruments OMAP5912 Reference Manual page 1655

McBSP Sample Rate Generator
3.4 Reset and Initialization Procedure for the Sample Rate Generator
44 Multichannel Buffered Serial Ports (McBSPs)
To reset and initialize the sample rate generator:
Step 1: Place the McBSP/sample rate generator in reset.
During an OMAP5912 reset, the sample rate generator, the receiver,
and the transmitter reset bits (GRST, RRST, and XRST) are auto-
matically forced to 0. Otherwise, during normal operation, the sam-
ple rate generator can be reset by making GRST = 0 in SPCR2, pro-
vided that CLKG and/or FSG is not used by any portion of the
McBSP. Depending on your system you may also want to reset the
receiver (RRST = 0 in SPCR1) and reset the transmitter (XRST = 0
in SPCR2).
If GRST = 0 due to an OMAP5912 reset, CLKG is driven by the CPU
clock divided by 2, and FSG is driven inactive-low. If GRST = 0 due
to program code, CLKG and FSG are driven low (inactive).
Step 2: Program the registers that affect the sample rate generator.
Program the sample rate generator registers (SRGR1 and SRGR2)
as required for your application. If necessary, other control registers
can be loaded with desired values, provided the respective portion
of the McBSP (the receiver or transmitter) is in reset.
After the sample rate generator registers are programmed, wait two
CLKSRG cycles. This ensures proper synchronization internally.
Step 3: Enable the sample rate generator (take it out of reset).
In SPCR2, make GRST = 1 to enable the sample rate generator.
After the sample rate generator is enabled, wait two CLKG cycles for
the sample rate generator logic to stabilize.
On the next rising edge of CLKSRG, CLKG transitions to 1 and starts
clocking with a frequency equal to
CLKG frequency +
where the input clock is selected with the SCLKME bit of PCR and
the CLKSM bit of SRGR2 in one of the configurations in the following
table.
Input clock frequency
( CLKGDV ) 1 )
SPRU762B