Texas Instruments OMAP5912 Reference Manual page 1558

Multimedia processor device overview and architecture
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USB OTG Controller
Figure 59.
OTG on USB Pin Group 0
U1
USB.DP
USB.DM
GPIOX
I2C.SCL
I2C.SDA
OMAP5912
266
Universal Serial Bus (USB)
OE
DAT
SE0
OTGIRQ
INT
SCL
SCL
SDA
SDA
USB OTG transceiver
R1, R2
C1
U1
U2
U3
J1
Proper initialization of the OMAP5912 device to support this mode of operation
requires proper setting of the top-level pin multiplexing for pins USB.DP and
USB.DM and selection of an HMC_MODE value that routes the OTG controller
port to pin group 0 (see Table 73). OTG_SYSCON_1.USB0_TRX_MODE
must be set to 3 to allow proper operation of the integrated USB transceiver.
System software is responsible for transferring control signals from the
OMAP5912 OTG controller to the OTG transceiver and status information
from the OTG transceiver to the OMAP5912 OTG controller registers.
When acting as an OTG default-A dual-role device, system software must
make use of the OTG transceiver for autoconnect mode. System software
must also configure the OTG transceiver to suspend mode whenever
OMAP5912 acts as a default-A device and is placing the OTG link into
suspend so that the remote-B device can issue an HNP.
U2
D+
D−
ID
VBUS
VDD
27 Ohm 5%
VBUS capacitance must meet OTG spec C DRD_VBUS
OMAP5912
USB OTG transceiver
Transient suppressor, like SN65220, SN65240, or SN75240
USB mini-AB receptacle
J1
R1
Transient
U3
suppressor
R2
C1
SPRU761A

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