Texas Instruments OMAP5912 Reference Manual page 1654

Figure 18. CLKG Synchronization and FSG Generation When GSYNC = 1 and
CLKGDV = 1
CLKS (CLKSP=1)
CLKS (CLKSP=0)
FSR external
(FSRP=0)
FSR external
(FSRP=1)
CLKG
(No need to
resynchronize)
CLKG
(Needs
resynchronization)
FSG
Figure 19. CLKG Synchronization and FSG Generation When GSYNC = 1 and
CLKGDV = 3
CLKS (CLKSP=1)
CLKS (CLKSP=0)
FSR external
(FSRP=0)
FSR external
(FSRP=1)
CLKG
(No need to
resynchronize)
CLKG
(Needs
resynchronization)
FSG
SPRU762B
Each of the figures shows what happens to CLKG when it is initially
synchronized and GSYNC = 1, and when it is not initially synchronized and
GSYNC = 1. The second figure has a slower CLKG frequency (it has a larger
divide-down value in the CLKGDV bits of SRGR1).
McBSP Sample Rate Generator
Multichannel Buffered Serial Ports (McBSPs) 43