Texas Instruments OMAP5912 Reference Manual page 1609

Multimedia processor device overview and architecture
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A
Access to system memory, USB host controller 63
C
Cache coherency in OHCI data, USB
host controller 64
Clock control, USB host controller 66
Conflicts between USB signal and top level
multiplexing, USB OTG controller 313
Control transfers on endpoint 0, USB device
controller 123
D
Device initialization, USB device controller 138
Device interrupts, USB device controller 145
Device reset interrupt handler, USB
device controller 163
Device state address changed handler, USB
device controller 162
Device state configuration changed handler, USB
device controller 161
Device states attached/unattached handler, USB
device controller 161
Device states changed handler, USB
device controller 157
Differences from OHCI USB specification, USB
host controller 22
DMA operation, USB device controller 178
SPRU761A
E
Endpoint 0 RX interrupt handler, USB
device controller 151
Endpoint 0 TX interrupt handler, USB
device controller 154
External connectivity, USB OTG controller 264
F
Features, USB OTG controller 195
Function connectivity with transceivers, USB
OTG controller 288
H
Hardware considerations, USB OTG controller 313
Hardware reset, USB host controller 66
Host connectivity with transceivers, USB
OTG controller 274
I
Implementation of OHCI USB specification, USB
host controller 23
ISO IN transactions, USB device controller 121
ISO OUT transactions, USB device controller 119
ISR flowcharts, USB device controller 145
Index
Index
Index
317

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