Register Descriptions - STMicroelectronics SPC572L series Reference Manual

Register Protection (REG_PROT)
67.3.2

Register descriptions

This section describes in address order all the REG_PROT registers. Each description
includes a standard register diagram with an associated figure number. Details of register bit
and field function follow the register diagrams, in bit order.
1
Always
Always
reads 0
reads 1
67.3.2.1 Module Registers (MR0-6143)
This is the lower 6 KB module memory space which holds all the functional registers of the
module that is protected by the REG_PROT module.
67.3.2.2 Module Register and Set Soft Lock Bit (LMR0-6143)
This is memory area #3 that provides mirrored access to the MR0-6143 registers with the
side effect of setting Soft Lock Bits in case of a write access to a MR that is defined as
protectable by the locking mechanism. Each MR is protectable by one associated bit in a
SLBRn.SLBm, according to the mapping described in
67.3.2.3 Soft Lock Bit Register (SLBR0-1535)
The Soft Lock Bit Registers hold the Soft Lock Bits for the protected registers in memory
area #1, which is the normal register address space of the protected module. Each SLB
register has a four Soft Lock Bits (SLB)-SLB3), each of which controls write access to a byte
in memory area #1. Each Soft Lock Bit also has a corresponding Write Enable bit in the
same register that controls whether the Soft Lock Bit can be written. The following table
shows the mapping between the Soft Lock Bits to the bytes in memory area
1986/2058
0
R/W Read-
BIT
bit only bit
Figure 1188. Key to Register Fields
DocID027809 Rev 4
BIT
Write- Write 1
only bit to clear
BIT
Table
BIT 0
Self-clear
bit
w1c BIT
1125.
RM0400
N/A