Electrical Characteristics - STMicroelectronics SPC572L series Reference Manual

RM0400
Clock
0
1 S1 S0 T5 T4 T3 T2 T1 T0
2 A0 Z3 Z2 Z1 Z0
3 D7 D6 D5 D4 D3 D2 D1 D0
66.22

Electrical characteristics

For all electrical characteristics related to core processor and Nexus 3 operation, please
refer to the SPC572Lx Data Sheet.
66.23 IEEE 1149.1 (JTAG) RD/WR sequences
This section contains example JTAG/OnCE sequences used to access resources.
66.23.1 JTAG sequence for accessing internal Nexus registers
Table 1120. Accessing internal Nexus 3 registers via JTAG/OnCE
TMS
Step #
Pin
IDLE → SELECT-DR_SCAN
1 1
SELECT-DR_SCAN → CAPTURE-DR (Nexus Command Register value loaded in shifter)
2 0
CAPTURE-DR → SHIFT-DR
3 0
4 0 (7) TCK clocks issued to shift in direction (rd/wr) bit and first 6 bits of Nexus reg. addr.
5 1 SHIFT-DR → EXIT1-DR (7th bit of Nexus reg. shifted in)
EXIT1-DR → UPDATE-DR (Nexus shifter is transferred to Nexus Command Register)
6 1
UPDATE-DR → SELECT-DR_SCAN
7 1
8 0 SELECT-DR_SCAN → CAPTURE-DR (Register value is transferred to Nexus shifter)
CAPTURE-DR → SHIFT-DR
9 0
10 0 (31) TCK clocks issued to transfer register value to TDO pin while shifting in TDI value
11 1 SHIFT-DR → EXIT1-DR (MSB of value is shifted in/out of shifter)
EXIT1-DR → UPDATE -DR (if access is write, shifter is transferred to register)
12 1
UPDATE-DR → RUN-TEST/IDLE (transfer complete — Nexus controller to Reg. Select state)
13 0
Table 1119. Data write message example (8 MDO / 2 MSEO)
nex_mdo[7:0]
X X X X X X
0
DocID027809 Rev 4
nex_mseo_b[1:0]
X X 1
0
S3 S2 0
1
Description
e200z215An3 Nexus 3 Module
State
1 Idle (or end of last message)
0 Start Message
1 End Packet
1 End Packet/ End Message
1981/2058
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