Add/Subtract - Prescale Down - Analog Devices ADSP-BF53x Blackfin Reference

Instruction Overview
Add/Subtract – Prescale Down
General Form
dest_reg = src_reg_0 + src_reg_1 (RND20)
dest_reg = src_reg_0 - src_reg_1 (RND20)
Syntax
Dreg_lo_hi = Dreg + Dreg (RND20) ; // (b)
Dreg_lo_hi = Dreg - Dreg (RND20) ; // (b)
Syntax Terminology
:
Dreg R7–0
:
Dreg_lo_hi R7–0.L
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Add/Subtract – Prescale Down instruction combines two 32-bit val-
ues to produce a 16-bit result as follows:
• Prescale down both input operand values by arithmetically shifting
them four places to the right
• Add or subtract the operands, depending on the instruction version
used
• Round the upper 16 bits of the result
• Extract the upper 16 bits to the
15-10 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
,
R7–0.H
dest_reg