Analog Devices ADSP-BF53x Blackfin Reference page 464

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Instruction Overview
BITTGL
General Form
BITTGL ( register, bit_position )
Syntax
BITTGL ( Dreg , uimm5 ) ;
Syntax Terminology
:
Dreg
R7–0
: 5-bit unsigned field, with a range of 0 through 31
uimm5
Instruction Length
In the syntax, comment (a) identifies 16-bit instruction length.
Functional Description
The Bit Toggle instruction inverts the bit designated by
the specified D-register. The instruction does not affect other bits in the
D-register.
The
bit_position
LSB, and 31 indicates the MSB of the 32-bit D-register.
Flags Affected
The Bit Toggle instruction affects flags as follows.
is set if result is zero; cleared if nonzero.
AZ
is set if result is negative; cleared if non-negative.
AN
is cleared.
AC0
13-6
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* (a) */
range of values is 0 through 31, where 0 indicates the
in
bit_position

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