Analog Devices ADSP-BF53x Blackfin Reference page 614

Instruction Overview
Special Applications
Typically,
SSYNC
change. In such cases, the following instruction sequence is typical.
:
instruction...
instruction...
CLI r0 ; /* disable interrupts */
idle ; /* enable Idle state */
ssync ; /* conclude all speculative states, assert external
Sync signal, await Synch_Ack, then assert external Idle signal
and stall in the Idle state until the Wakeup signal. Clock input
can be modified during the stall. */
sti r0 ; /* re-enable interrupts when Wakeup occurs */
instruction...
instruction...
16-10 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
prepares the architecture for clock cessation or frequency