Instruction Overview
•
is set if
VS
• All other flags are unaffected.
The ADSP-BF535 processor has fewer
operate differently than subsequent Blackfin family products. For
more information on the ADSP-BF535 status flags, see
on page
Required Mode
User & Supervisor
Parallel Issue
The 32-bit versions of this instruction can be issued in parallel with spe-
cific other 16-bit instructions. For details, see
Instructions" on page
The 16-bit versions of this instruction cannot be issued in parallel with
other instructions.
Example
r5 = r2 - r1 ;
saturation */
r5 = r2 - r1(ns) ;
instruction length */
r5 = r2 - r1(s) ;
r4.l = r0.l - r7.l (ns) ;
r4.l = r0.l - r7.h (s) ;
r0.l = r2.h - r4.l(ns) ;
r1.l = r3.h - r7.h(ns) ;
r4.h = r0.l - r7.l (ns) ;
r4.h = r0.l - r7.h (ns) ;
r0.h = r2.h - r4.l(s) ;
r1.h = r3.h - r7.h(ns) ;
15-88
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
is set; unaffected otherwise.
V
A-3.
20-1.
/* 16-bit instruction length subtract, no
/* same result as above, but 32-bit
/* saturate the result */
/* saturate the result */
/* saturate the result */
flags and some flags
ASTAT
Table A-1
"Issuing Parallel
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