Rnd (Round To Half-Word) - Analog Devices ADSP-BF53x Blackfin Reference

RND (Round to Half-Word)

General Form
dest_reg = src_reg (RND)
Syntax
Dreg_lo_hi =Dreg (RND) ;
16 bits. (b) */
Syntax Terminology
:
Dreg R7– 0
:
Dreg_lo_hi R7–0.L
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Round to Half-Word instruction rounds a 32-bit, normalized-frac-
tion number into a 16-bit, normalized-fraction number by extracting and
saturating bits 31–16, then discarding bits 15–0. The instruction supports
only biased rounding, which adds a half LSB (in this case, bit 15) before
truncating bits 15–0. The ALU performs the rounding. The
in the register has no bearing on the rounding behavior of this
ASTAT
instruction.
Fractional data types such as the operands used in this instruction are
always signed.
See "Saturation" on page 1-17
See "Rounding and Truncating" on page 1-19
ing behavior.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* round and saturate the source to
,
R7–0.H
for a description of saturation behavior.
Arithmetic Operations
RND_MOD
for a description of round-
bit
15-77