Analog Devices ADSP-BF53x Blackfin Reference page 352

Instruction Overview
The indirect address must be even to maintain 2-byte half-word address
alignment. Failure to maintain proper alignment causes an misaligned
memory access exception.
The instruction versions that explicitly modify
optional circular buffering. See
on page 1-21
disable it prior to issuing this instruction by clearing the Length
Register (
Example: If you use
clear
L2
beforehand can result in unexpected Ireg values.
The circular address buffer registers (Index, Length, and Base) are
not initialized automatically by Reset. Traditionally, user software
clears all the circular address buffer registers during boot-up to dis-
able circular buffering, then initializes them later, if needed.
Options
The Load Low Data Register Half instruction supports the following
options.
• Post-increment the source pointer I-register by 2 bytes.
• Post-decrement the source pointer I-register by 2 bytes.
8-28 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
for more details. Unless circular buffering is desired,
) corresponding to the
Lreg
to increment your address pointer, first
I2
to disable circular buffering. Failure to explicitly clear
Ireg
"Automatic Circular Addressing"
used in this instruction.
Ireg
support
Lreg