Core Event Controller (Cec); System Interrupt Controller (Sic); Syntax Conventions; Case Sensitivity - Analog Devices ADSP-BF53x Blackfin Reference

Syntax Conventions

Core Event Controller (CEC)

The Core Event Controller supports nine general-purpose interrupts
(IVG15 – 7), in addition to the dedicated interrupt and exception events.
Of these general-purpose interrupts, the two lowest priority interrupts
(IVG15 – 14) are recommended to be reserved for software interrupt han-
dlers, leaving seven prioritized interrupt inputs to support peripherals.

System Interrupt Controller (SIC)

The System Interrupt Controller provides the mapping and routing of
events from the many peripheral interrupt sources to the prioritized gen-
eral-purpose interrupt inputs of the CEC. Although the processor
provides a default mapping, the user can alter the mappings and priorities
of interrupt events by writing the appropriate values into the Interrupt
Assignment Registers (IAR).
Syntax Conventions
The Blackfin processor instruction set supports several syntactic conven-
tions that appear throughout this document. Those conventions are given
below.

Case Sensitivity

The instruction syntax is case insensitive. Upper and lower case letters can
be used and intermixed arbitrarily.
The assembler treats register names and instruction keywords in a
case-insensitive manner. User identifiers are case sensitive. Thus,
, ,
R3.L r3.l r3.L
1-8 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
are all valid, equivalent input to the assembler.
,
R3.l