Analog Devices ADSP-BF53x Blackfin Reference page 1023

load instructions
load half-word – zero-extended, 8-15,
C-19
load high data register half, 8-23,
load immediate, 8-3,
load low data register half, 8-27,
load pointer register, 8-7,
stalled, 6-34
load low data register half instruction, 8-27,
C-21
load pointer register instruction, 8-7,
loads, speculative execution,
load / store instructions, 5-6,
logging nested interrupt,
logical operations, 2-26, 12-1,
<< (logical left shift) operator, 19-23,
>> (logical right shift) operator,
logical shift (LSHIFT) instruction, 2-48,
14-14, C-50
logical shifts, 2-1, 2-15
long jump (JUMP.L) instruction,
look-ahead address, 4-7
loopback, 4-22, 4-25
loop bottom (LB0, LB1) registers, 1-14,
4-22, 4-24, C-2
loop counter, modifying,
loop count (LC0, LC1) registers, 1-14,
4-22, 4-24, C-2
LOOP instruction, 7-13
loop PC-relative constant, 1-12,
loop registers
initialization, 7-15
table of, 4-22
zero-overhead, 4-6
loops
branch instructions,
buffer, 4-24
conditions, evaluation,
counter register, 7-17
disabling, 4-23
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
(continued)
C-20
C-16
C-21
C-17
C-17
6-69
C-16
4-55
C-43
19-28
19-28
4-11
7-18
C-6
7-18
4-22
loops
hardware, 4-21
inner, 4-25
instruction fetch time,
interrupted, 4-27
last instruction restrictions,
loopback, 4-22
loop bottom register,
loop count register, 9-7
LOOP instruction, 7-13
loop top register, 9-7
LSETUP (loop setup) instruction,
modifying loop counter,
nested, 7-16
outer, 4-25
program flow, 4-1
registers, 4-6, 4-22, 7-15
restoring, 4-27
saving and resuming, example,
small loop count values,
span, 7-15
termination conditions,
top and bottom addresses,
two-dimensional, 4-24
undefined execution,
unrolling, example, 4-26
zero-overhead, 7-15
zero-overhead and trace buffer,
zero-overhead loops
setup instruction,
loop setup (LSETUP) instruction,
loop top (LT0, LT1) registers, 1-13, 4-22,
4-24, C-2
lppcrel11m2, 7-14
L-registers (length), 5-8
Lreg. See length registers (L[3:0])
LRU (least recently used) bit,
LRU (least recently used) policy,
LRUPRIO bit, 6-23
Index
(continued)
4-24
7-17
9-7
7-13
7-18
4-27
7-16
4-3
4-23
7-18
21-15
7-13
7-13
6-42
6-51
I-21