Analog Devices ADSP-BF53x Blackfin Reference page 1015

exceptions
multiple, 4-65
not invoked by force interrupt / reset
instruction, 16-18
not masked by disable interrupts
instruction, 16-13
prioritization, 6-52
program flow, 4-2
protection violation, 7-11, 9-6, 10-3,
10-10, 16-4, 16-13, 16-15,
protection violation, not flagged, 17-3,
17-5, 17-7, 17-9
resolved during synchronization, 16-5,
16-6, 16-9
resolving before TESTSET operation
begins, 16-24
resolving before TESTSET operation
completes, 16-23
return from (RTE) instruction,
return from (RTX) instruction, 7-10,
7-11
single step, 4-66
trace buffer, 4-66
undefined instruction, 4-65, 8-8,
unrecoverable event,
watchpoint match, 4-65
while exception handler executing,
exclusive, definition, 6-75
exclusive data cache line,
exclusive-OR, 12-8
exclusive-OR (XOR) instruction, 12-8,
C-43
EXCPT (force exception) instruction,
4-66, 16-20, C-99
execute 1 (EX1), 4-7
execute 2 (EX2), 4-7
execution cycle count (CYCLES and
CYCLES2) registers,
execution trace, code examples,
execution unit, components,
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
(continued)
16-19
7-11
10-3
4-65
4-67
6-34
21-24
21-18
4-8
EXPADJ instruction, 15-26
exponent detection
functions, 2-48
instruction, C-60
exponent logic, 2-15
external bus interface unit. See EBIU
external event management instructions,
16-1, C-99
external memory, 1-6,
EXTRACT (bit field extraction)
instruction, 13-16
F
Fast Fourier Transform,
FAULT[15:0] field, 6-62,
FAULT_ADDR[15:0] field,
FAULT_ADDR[31:16] field,
FAULT_DAG bit, 6-62
FAULT_ILLADDR bit, 6-62,
FAULT_RW bit, 6-62
FAULT_USERSUPV bit, 6-62,
fetch address
described, 4-8
incrementation, 4-8
instruction pipeline,
fetching order, 6-14
FFT (Fast Fourier Transform) calculations,
5-15
field deposit, 2-52
field extract, 2-52
flags
ADSP-BF535, A-2
arithmetic status, summarized,
overflow, 2-14
flash memory, 1-6
flow control instructions,
FLUSH (data cache flush) instruction,
6-37, 17-5, C-101
Index
6-1
5-15
6-63
6-64
6-64
6-63
6-63
4-3
1-15
C-13
I-13