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Table 2-11. Shifter Instruction Summary (Cont'd)
Instruction
An = An >>> uimm5 ;
An = An >> uimm5 ;
An = An << uimm5 ;
Dreg_lo_hi = Dreg_lo_hi >>>
uimm4 ;
Dreg_lo_hi = Dreg_lo_hi >>
uimm4 ;
Dreg_lo_hi = Dreg_lo_hi <<
uimm4 ;
Dreg >>>= Dreg ;
Dreg >>= Dreg ;
Dreg <<= Dreg ;
Dreg = ASHIFT Dreg BY
Dreg_lo ;
Dreg = LSHIFT Dreg BY
Dreg_lo ;
Dreg = ROT Dreg BY imm6 ;
Dreg = ASHIFT Dreg BY
Dreg_lo (V) ;
Dreg = LSHIFT Dreg BY
Dreg_lo (V) ;
Dreg_lo_hi = ASHIFT
Dreg_lo_hi BY Dreg_lo ;
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
ASTAT Status Flag
AZ
AN AC0
AC0_COPY
AC1
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
*
*
–
–
–
–
*
*
–
*
*
–
*
*
–
Computational Units
AV0
AV1
CC V
AV0S
AV1S
V_COPY
VS
** 0/
** 1/–
–
–
–
** 0/
** 1/–
–
–
–
* 0
* 1
–
–
–
–
–
**/–
–
–
–
**/–
–
–
–
*
–
–
–
**/–
–
–
–
**/–
–
–
–
**/–
–
–
–
*
–
–
–
**/–
–
–
***
–
–
–
–
*
–
–
–
**/–
–
–
–
*
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