Analog Devices ADSP-BF53x Blackfin Reference page 864

Arithmetic Operations Instructions
Table C-17. Arithmetic Operations Instructions (Sheet 10 of 44)
Instruction
and Version
Multiply 16-Bit Operands
Dreg_even = Dreg_lo_hi * Dreg_lo_hi (FU)
Multiply 16-Bit Operands
Dreg_even = Dreg_lo_hi * Dreg_lo_hi (IS)
Multiply 16-Bit Operands
Dreg_even = Dreg_lo_hi * Dreg_lo_hi (S2RND)
Multiply 16-Bit Operands
NOTE: When issuing compatible load/store instructions in parallel with a Multiply 16-Bit Operands
instruction, add 0x0800 0000 to the Multiply 16-Bit Operands opcode.
Dreg_even = Dreg_lo_hi * Dreg_lo_hi (ISS2)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (FU)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IS)
C-64 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC288 2000— 1 1 0 0 0 0 1 0 1 0 0 0 1 0 0 0
0xC288 27FF
0 0 1 0 0 Dreg
0xC308 2000— 1 1 0 0 0 0 1 1 0 0 0 0 1 0 0 0
0xC308 27FF
0 0 1 0 0 Dreg
0xC228 2000— 1 1 0 0 0 0 1 0 0 0 1 0 1 0 0 0
0xC228 27FF
0 0 1 0 0 Dreg
0xC328 2000— 1 1 0 0 0 0 1 1 0 0 1 0 1 0 0 0
0xC328 27FF
0 0 1 0 0 Dreg
0xC204 0000— 1 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0
0xC204 C1FF
Dreg
half
0xC284 0000— 1 1 0 0 0 0 1 0 1 0 0 0 0 1 0 0
0xC284 C1FF
Dreg
half
0xC304 0000— 1 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0
0xC304 C1FF
Dreg
half
Bin
Dest.
half Dreg #
Dest.
half Dreg #
Dest.
half Dreg #
Dest.
half Dreg #
0 0 0 0 0 Dest.
Dreg #
0 0 0 0 0 Dest.
Dreg #
0 0 0 0 0 Dest.
Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #
src_reg_ src_reg_
0 Dreg # 1 Dreg #