Arithmetic Logic Unit (ALU)
For example:
R3 = R1 + R2, R4 = R1 – R2 (NS) ;
adds the 32-bit contents of
result in
with no saturation.
R3
The instruction also subtracts the 32-bit contents of
and deposits the result in
A specialized form of this instruction uses the ALU 40-bit result registers
as input operands, creating the sum and differences of the
registers.
For example:
R3 = A0 + A1, R4 = A0 – A1 (S) ;
transfers to the result registers two 32-bit, saturated, sum and difference
values of the ALU registers.
ALU Instruction Summary
Table 2-9
lists the ALU instructions. For more information about assem-
bly language syntax and the effect of ALU instructions on the status flags,
see
Chapter 15, "Arithmetic Operations."
In
Table
2-9, note the meaning of these symbols:
• Dreg denotes any Data Register File register.
• Dreg_lo_hi denotes any 16-bit register half in any Data Register
File register.
• Dreg_lo denotes the lower 16 bits of any Data Register File
register.
• imm7 denotes a signed, 7-bit wide, immediate value.
2-30
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
to the 32-bit contents of
R2
with no saturation.
R4
and deposits the
R1
from that of
R2
R1
and
A0
A1
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