Analog Devices ADSP-BF53x Blackfin Reference page 959

Table C-23. 32-Bit Opcode Instructions (Sheet 6 of 40)
Instruction
and Version
Multiply and Multiply-Accumulate to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (T)
Multiply and Multiply-Accumulate to Half Register
Dreg_hi = (A1 –= Dreg_lo_hi * Dreg_lo_hi) (T)
Move Register Half
Dreg_hi = A1 (T)
Move Register Half
Dreg_lo = A0, Dreg_hi = A1 (T)
Dreg_hi = A1, Dreg_lo = A0 (T)
Multiply and Multiply-Accumulate to Half Register
Dreg_hi = (A1 = Dreg_lo_hi * Dreg_lo_hi) (T, M)
Vector Multiply and Multiply-Accumulate
Dreg_lo = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_hi = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (T, M)
Multiply and Multiply-Accumulate to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (T, M)
Multiply and Multiply-Accumulate to Half Register
Dreg_hi = (A1 –= Dreg_lo_hi * Dreg_lo_hi) (T, M)
Vector Multiply and Multiply-Accumulate
A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi ,
A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi (W32)
Multiply and Multiply-Accumulate to Accumulator
A1 = Dreg_lo_hi * Dreg_lo_hi (W32)
Multiply and Multiply-Accumulate to Accumulator
A1 += Dreg_lo_hi * Dreg_lo_hi (W32)
Multiply and Multiply-Accumulate to Accumulator
A1 –= Dreg_lo_hi * Dreg_lo_hi (W32)
Multiply and Multiply-Accumulate to Accumulator
A0 = Dreg_lo_hi * Dreg_lo_hi (W32)
Multiply and Multiply-Accumulate to Accumulator
A0 += Dreg_lo_hi * Dreg_lo_hi (W32)
Multiply and Multiply-Accumulate to Accumulator
A0 –= Dreg_lo_hi * Dreg_lo_hi (W32)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Instruction Opcodes
Opcode
Range
0xC045 1800—
0xC045 D9FF
0xC046 1800—
0xC046 D9FF
0xC047 1800—
0xC047 19C0
0xC047 3800—
0xC047 39C0
0xC054 1800—
0xC054 D9FF
0xC054 2000—
0xC057 FFFF
0xC055 1800—
0xC055 D9FF
0xC056 1800—
0xC056 D9FF
0xC060 0000—
0xC063 DE3F
0xC060 1800—
0xC060 D83F
0xC061 1800—
0xC061 D83F
0xC062 1800—
0xC062 D83F
0xC063 0000—
0xC063 063F
0xC063 0800—
0xC063 0E3F
0xC063 1000—
0xC063 163F
C-159