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Table C-17. Arithmetic Operations Instructions (Sheet 11 of 44)
Instruction
and Version
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IU)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (T)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (TFU)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (S2RND)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (ISS2)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (IH)
Multiply 16-Bit Operands
Dreg_hi = Dreg_lo_hi * Dreg_lo_hi (M)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC384 0000—
1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 0
0xC384 C1FF
Dreg
half
0xC244 0000—
1 1 0 0 0 0 1 0 0 1 0 0 0 1 0 0
0xC244 C1FF
Dreg
half
0xC2C4 0000—
1 1 0 0 0 0 1 0 1 1 0 0 0 1 0 0
0xC2C4 C1FF
Dreg
half
0xC224 0000—
1 1 0 0 0 0 1 0 0 0 1 0 0 1 0 0
0xC224 C1FF
Dreg
half
0xC324 0000—
1 1 0 0 0 0 1 1 0 0 1 0 0 1 0 0
0xC324 C1FF
Dreg
half
0xC364 0000—
1 1 0 0 0 0 1 1 0 1 1 0 0 1 0 0
0xC364 C1FF
Dreg
half
0xC214 0000—
1 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0
0xC214 C1FF
Dreg
half
Instruction Opcodes
Bin
0 0 0 0 0 Dest.
Dreg #
0 0 0 0 0 Dest.
Dreg #
0 0 0 0 0 Dest.
Dreg #
0 0 0 0 0 Dest.
Dreg #
0 0 0 0 0 Dest.
Dreg #
0 0 0 0 0 Dest.
Dreg #
0 0 0 0 0 Dest.
Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
C-65
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