Vector Add / Subtract - Analog Devices ADSP-BF53x Blackfin Reference

Instruction Overview

Vector Add / Subtract

General Form
dest = src_reg_0 +|+ src_reg_1
dest = src_reg_0 –|+ src_reg_1
dest = src_reg_0 +|– src_reg_1
dest = src_reg_0 –|– src_reg_1
dest_0 = src_reg_0 +|+ src_reg_1,
dest_1 = src_reg_0 –|– src_reg_1
dest_0 = src_reg_0 +|– src_reg_1,
dest_1 = src_reg_0 –|+ src_reg_1
dest_0 = src_reg_0 + src_reg_1,
dest_1 = src_reg_0 – src_reg_1
dest_0 = A1 + A0, dest_1 = A1 – A0
dest_0 = A0 + A1, dest_1 = A0 – A1
Syntax
Dual 16-Bit Operations
Dreg = Dreg +|+ Dreg (opt_mode_0) ; /* add | add (b) */
Dreg = Dreg –|+ Dreg (opt_mode_0) ; /* subtract | add (b) */
Dreg = Dreg +|– Dreg (opt_mode_0) ; /* add | subtract (b) */
Dreg = Dreg –|– Dreg (opt_mode_0) ; /* subtract | subtract (b) */
Quad 16-Bit Operations
Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (opt_mode_0,
opt_mode_2) ;
/* add | add, subtract | subtract; the set of source registers
must be the same for each operation (b) */
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (opt_mode_0,
opt_mode_2) ;
/* add | subtract, subtract | add; the set of source registers
must be the same for each operation (b) */
19-18 ADSP-BF53x/BF56x Blackfin Processor Programming Reference