Byteop16P (Quad 8-Bit Add) - Analog Devices ADSP-BF53x Blackfin Reference

BYTEOP16P (Quad 8-Bit Add)

General Form
(dest_reg_1, dest_reg_0) = BYTEOP16P (src_reg_0, src_reg_1)
(dest_reg_1, dest_reg_0) = BYTEOP16P (src_reg_0, src_reg_1) (R)
Syntax
/* forward byte order operands */
( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) ;
/* reverse byte order operands */
( Dreg, Dreg ) = BYTEOP16P ( Dreg_pair, Dreg_pair ) (R)
; /* (b) */
Syntax Terminology
:
Dreg R7–0
:
Dreg_pair R1:0
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Quad 8-Bit Add instruction adds two unsigned quad byte number
sets byte-wise, adjusting for byte alignment. It then loads the byte-wise
results as 16-bit, zero-extended, half-words in two destination registers, as
shown inTable 18-7
The only valid input source register pairs are
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
, , only
R3:2
and Table 18-8.
Video Pixel Operations
/* (b) */
and .
R1:0 R3:2
18-15