Disalgnexcpt - Analog Devices ADSP-BF53x Blackfin Reference

Instruction Overview

DISALGNEXCPT

General Form
DISALGNEXCPT
Syntax
DISALGNEXCPT ;
Syntax Terminology
None
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Disable Alignment Exception for Load (
prevents exceptions that would otherwise be caused by misaligned 32-bit
memory loads issued in parallel. This instruction only affects misaligned
32-bit load instructions that use I-register indirect addressing.
In order to force address alignment to a 32-bit boundary, the two LSBs of
the address are cleared before being sent to the memory system. The I-reg-
ister is not modified by the
modifications performed to the I-register by a parallel instruction are not
affected by the
Flags Affected
None
18-6 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* (b) */
DISALIGNEXCPT
instruction.
DISALIGNEXCPT
) instruction
DISALGNEXCPT
instruction. Also, any