Analog Devices ADSP-BF53x Blackfin Reference page 870

Arithmetic Operations Instructions
Table C-17. Arithmetic Operations Instructions (Sheet 16 of 44)
Instruction
and Version
Multiply and Multiply-Accumulate
to Accumulator
A0 += Dreg_lo_hi * Dreg_lo_hi
Multiply and Multiply-Accumulate
to Accumulator
A0 += Dreg_lo_hi * Dreg_lo_hi (FU)
Multiply and Multiply-Accumulate
to Accumulator
A0 += Dreg_lo_hi * Dreg_lo_hi (IS)
Multiply and Multiply-Accumulate
to Accumulator
NOTE: When issuing compatible load/store instructions in parallel with a Multiply and Multiply-Accumu-
late instruction, add 0x0800 0000 to the Multiply and Multiply-Accumulate opcode.
A0 += Dreg_lo_hi * Dreg_lo_hi (W32)
Multiply and Multiply-Accumulate
to Accumulator
A0 – = Dreg_lo_hi * Dreg_lo_hi
Multiply and Multiply-Accumulate
to Accumulator
A0 – = Dreg_lo_hi * Dreg_lo_hi (FU)
Multiply and Multiply-Accumulate
to Accumulator
A0 – = Dreg_lo_hi * Dreg_lo_hi (IS)
C-70 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC003 0800— 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1
0xC003 0E3F
0 0 0 0 1 Dreg
0xC083 0800— 1 1 0 0 0 0 0 0 1 0 0 0 0 0 1 1
0xC083 0E3F
0 0 0 0 1 Dreg
0xC103 0800— 1 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1
0xC103 0E3F
0 0 0 0 1 Dreg
0xC063 0800— 1 1 0 0 0 0 0 0 0 1 1 0 0 0 1 1
0xC063 0E3F
0 0 0 0 1 Dreg
0xC003 1000— 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1
0xC003 163F
0 0 0 1 0 Dreg
0xC083 1000— 1 1 0 0 0 0 0 0 1 0 0 0 0 0 1 1
0xC083 163F
0 0 0 1 0 Dreg
0xC103 1000— 1 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1
0xC103 163F
0 0 0 1 0 Dreg
Bin
0 0 0 src_reg_
half 0 Dreg #
0 0 0 src_reg_
half 0 Dreg #
0 0 0 src_reg_
half 0 Dreg #
0 0 0 src_reg_
half 0 Dreg #
0 0 0 src_reg_
half 0 Dreg #
0 0 0 src_reg_
half 0 Dreg #
0 0 0 src_reg_
half 0 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #