Store High Data Register Half - Analog Devices ADSP-BF53x Blackfin Reference

Store High Data Register Half

General Form
W [ indirect_address ] = Dreg_hi
Syntax
W [ Ireg ] = Dreg_hi ;
W [ Ireg ++ ] = Dreg_hi ;
addressing (a) */
W [ Ireg -- ] = Dreg_hi ;
addressing (a) */
W [ Preg ] = Dreg_hi ;
W [ Preg ++ Preg ] = Dreg_hi ;
1
index (a) */
Syntax Terminology
:
Dreg_hi P7–0.H
: , ,
Preg P5–0 SP
:
Ireg I3–0
Instruction Length
In the syntax, comment (a) identifies 16-bit instruction length.
Functional Description
The Store High Data Register Half instruction stores the most significant
16 bits of a 32-bit data register to a 16-bit memory location. The Pointer
register is either an I-register or a P-register.
1
See "Indirect and Post-Increment Index Addressing" on page
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* indirect data addressing (a)*/
/* indirect, post-increment data
/* indirect, post-decrement data
/* indirect (a)*/
FP
/* indirect, post-increment
8-47.
Load / Store
8-45