Analog Devices ADSP-BF53x Blackfin Reference page 710

Instruction Overview
r0=r2 +|- r1(co) ;
crossed over in the destination register */
r7=r3 -|- r6(sco) ;
half-word results crossed over in the destination register */
r5=r3 +|+ r4, r7=r3-|-r4 ;
subtract|subtract */
r5=r3 +|- r4, r7=r3 -|+ r4 ;
add|subtract, subtract|add */
r5=r3 +|- r4, r7=r3 -|+ r4(asr) ;
add|subtract, subtract|add, with all results divided by 2 (right
shifted 1 place) before storing into destination register */
r5=r3 +|- r4, r7=r3 -|+ r4(asl) ;
add|subtract, subtract|add, with all results multiplied by 2
(left shifted 1 place) before storing into destination register
dual */
r2=r0+r1, r3=r0-r1 ;
r2=r0+r1, r3=r0-r1(s) ;
saturation */
r4=a1+a0, r6=a1-a0 ;
subtracted from A1 */
r4=a0+a1, r6=a0-a1(s) ;
with saturation, A1 subtracted from A0 */
Also See
Add, Subtract
Special Applications
FFT butterfly routines in which each of the registers is considered a single
complex number often use the Vector Add / Subtract instruction.
/* If r1 = 0x0003 0004 and r2 = 0x0001 0002, then . . . */
r0 = r2 +|- r1(co) ;
/* . . . produces r0 = 0xFFFE 0004 */
19-22 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* add|subtract with half-word results
/* subtract|subtract with saturation and
/* quad 16-bit operations, add|add,
/* quad 16-bit operations,
/* quad 16-bit operations,
/* quad 16-bit operations,
/* 32-bit operations */
/* dual 32-bit operations with
/* dual 40-bit Accumulator operations, A0
/* dual 40-bit Accumulator operations