Analog Devices ADSP-BF53x Blackfin Reference page 847

Table C-16. Shift / Rotate Operations Instructions (Sheet 2 of 9)
Instruction
and Version
Arithmetic Shift
Dreg_hi = Dreg_lo >>> uimm4
Arithmetic Shift
Dreg_hi = Dreg_hi >>> uimm4
Arithmetic Shift
Dreg_lo = Dreg_lo << uimm4 (S)
Arithmetic Shift
Dreg_lo = Dreg_hi << uimm4 (S)
Arithmetic Shift
Dreg_hi = Dreg_lo << uimm4 (S)
Arithmetic Shift
Dreg_hi = Dreg_hi << uimm4 (S)
Arithmetic Shift
Dreg = Dreg >>> uimm5
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC680 2180— 1 1 0 0 0 1 1 0 1 x x 0 0 0 0 0
0xC680 2FFF
0 0 1 0 Dest.
0xC680 3180— 1 1 0 0 0 1 1 0 1 x x 0 0 0 0 0
0xC680 3FFF
0 0 1 1 Dest.
0xC680 4000— 1 1 0 0 0 1 1 0 1 x x 0 0 0 0 0
0xC680 4E7F
0 1 0 0 Dest.
0xC680 5000— 1 1 0 0 0 1 1 0 1 x x 0 0 0 0 0
0xC680 5E7F
0 1 0 1 Dest.
0xC680 6000— 1 1 0 0 0 1 1 0 1 x x 0 0 0 0 0
0xC680 6E7F
0 1 1 0 Dest.
0xC680 7000— 1 1 0 0 0 1 1 0 1 x x 0 0 0 0 0
0xC680 7E7F
0 1 1 1 Dest.
0xC682 0100— 1 1 0 0 0 1 1 0 1 x x 0 0 0 1 0
0xC682 0FFF
0 0 0 0 Dest.
Instruction Opcodes
Bin
2's comp. of
Dreg # uimm4
2's comp. of
Dreg # uimm4
uimm4
Dreg #
uimm4
Dreg #
uimm4
Dreg #
uimm4
Dreg #
2's complement of
Dreg # uimm5
Source
Dreg #
Source
Dreg #
Source
Dreg #
Source
Dreg #
Source
Dreg #
Source
Dreg #
Source
Dreg #
C-47