Vector Arithmetic Shift - Analog Devices ADSP-BF53x Blackfin Reference

Vector Arithmetic Shift

General Form
dest_reg = src_reg >>> shift_magnitude (V)
dest_reg = ASHIFT src_reg BY shift_magnitude (V)
Syntax
Constant Shift Magnitude
Dreg = Dreg >>> uimm4 (V) ;
ate (b) */
Dreg = Dreg << uimm4 (V,S) ;
ate with saturation (b) */
Registered Shift Magnitude
Dreg = ASHIFT Dreg BY Dreg_lo (V) ;
Dreg = ASHIFT Dreg BY Dreg_lo (V, S) ;
with saturation (b) */
Arithmetic Left Shift Immediate
There is no syntax specific to a vector arithmetic left shift immediate
instruction. Use the Vector Logical Shift syntax for vector left shifting,
which accomplishes the same function for sign-extended numbers in num-
ber-normalizing routines. See
Syntax Terminology
:
Dreg R7–0
:
Dreg_lo R7–0.L
: unsigned 4-bit field, with a range of 0 through 15
uimm4
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* arithmetic shift right, immedi-
/* arithmetic shift left, immedi-
/* arithmetic shift (b) */
/* arithmetic shift
"">>>" and "<<" Syntax"
Vector Operations
notes for caveats.
19-23