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Table C-21. Vector Operations Instructions (Sheet 19 of 33)
Instruction
and Version
Vector Multiply and
Multiply-Accumulate
Dreg_lo = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_hi = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (S2RND)
Vector Multiply and
Multiply-Accumulate
Dreg_lo = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_hi = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (ISS2)
Vector Multiply and
Multiply-Accumulate
Dreg_lo = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_hi = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (IH)
Vector Multiply and
Multiply-Accumulate
Dreg_lo = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_hi = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (M)
Vector Multiply and
Multiply-Accumulate
Dreg_lo = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_hi = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (FU, M)
Vector Multiply and
Multiply-Accumulate
Dreg_lo = (A0 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) ,
Dreg_hi = (A1 {=, +=, or –=} Dreg_lo_hi * Dreg_lo_hi) (IS, M)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 0 0 0 0 0 0 0 0 1 0 0 1 op1
0xC024 2000—
0xC027 FFFF
Dreg
half 0 1 1 0 0
1 1 0 0 0 0 0 1 0 0 1 0 0 1 op1
0xC124 2000—
0xC127 FFFF
Dreg
half 1 1 op0
1 1 0 0 0 0 0 1 0 1 1 0 0 1 op1
0xC164 2000—
0xC167 FFFF
Dreg
half 1 1 op0
1 1 0 0 0 0 0 0 0 0 0 1 0 1 op1
0xC014 2000—
0xC017 FFFF
Dreg
half 1 1 op0
1 1 0 0 0 0 0 0 1 0 0 1 0 1 op1
0xC094 2000—
0xC097 FFFF
Dreg
half 1 1 op0
1 1 0 0 0 0 0 1 0 0 0 1 0 1 op1
0xC114 2000—
0xC117 FFFF
Dreg
half 1 1 op0
Instruction Opcodes
Bin
Dest.
src_reg_
Dreg #
0 Dreg #
Dreg
Dest.
src_reg_
half 0
Dreg #
0 Dreg #
Dreg
Dest.
src_reg_
half 0
Dreg #
0 Dreg #
Dreg
Dest.
src_reg_
half 0
Dreg #
0 Dreg #
Dreg
Dest.
src_reg_
half 0
Dreg #
0 Dreg #
Dreg
Dest.
src_reg_
half 0
Dreg #
0 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
src_reg_
1 Dreg #
C-125
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