Load Half-Word - Zero-Extended - Analog Devices ADSP-BF53x Blackfin Reference

Load Half-Word – Zero-Extended
General Form
D-register = W [ indirect_address ] (Z)
Syntax
Dreg = W [ Preg ] (Z) ;
Dreg = W [ Preg ++ ] (Z) ;
Dreg = W [ Preg -- ] (Z) ;
Dreg = W [ Preg + uimm5m2 ] (Z) ;
(a) */
Dreg = W [ Preg + uimm16m2 ] (Z) ;
(b) */
Dreg = W [ Preg - uimm16m2 ] (Z) ;
(b) */
Dreg = W [ Preg ++ Preg ] (Z) ;
1
index (a) */
Syntax Terminology
:
Dreg R7–0
: , ,
Preg P5–0 SP
: 5-bit unsigned field that must be a multiple of 2, with a range of
uimm5m2
0 through 30 bytes
: 16-bit unsigned field that must be a multiple of 2, with a range
uimm16m2
of 0 through 65,534 bytes (0x0000 through 0xFFFC)
1
See "Indirect and Post-Increment Index Addressing" on page
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* indirect (a)*/
/* indirect, post-increment (a)*/
/* indirect, post-decrement (a)*/
FP
/* indexed with small offset
/* indexed with large offset
/* indexed with large offset
/* indirect, post-increment
8-17.
Load / Store
8-15