Analog Devices ADSP-BF53x Blackfin Reference page 259

• If
DCBS = 1
addresses where
A[23] = 1
In this case,
that is stored with the tag in the cache and compared for hit/miss
processing by the cache.
The result of choosing
• If
DCBS = 0
Alternating 16K byte pages of memory map into each of the two
16K byte caches implemented by the two data banks.
Consequently:
Any data in the first 16K byte of memory could be stored
only in Data Bank B.
Any data in the next address range (16K byte through 32K
byte) – 1 could be stored only in Data Bank A.
Any data in the next range (32K byte through 48K byte) – 1
would be stored in Data Bank B.
Alternate mapping would continue.
As a result, the cache operates as if it were a single, contiguous,
2-Way set associative 32K byte cache. Each Way is 16K byte long,
and all data elements with the same first 14 bits of address index to
a unique set in which up to two elements can be stored (one in each
Way).
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
, then is part of the address index, and all
A[23]
use Data Bank B. All addresses where
A[23] = 0
use Data Bank A.
is treated as merely another bit in the address
A[14]
or
DCBS = 0 DCBS = 1
, selects Data Bank A instead of Data Bank B.
A[14]
is:
Memory
6-31