Data Types
With either fractional or integer operations, the multiplier output product
is fed into a 40-bit adder/subtracter which adds or subtracts the new prod-
uct with the current contents of the
40-bit result.
SHIFTED
OUT
P SIGN,
7 BITS
31 31 31 31 31 31 31 31 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
A0.X
Figure 2-5. Fractional Multiplier Results Format
2-18
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
A0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
or
register to produce the final
A1
MULTIPLIER P OUTPUT
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
A0.W
ZERO
FILLED
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