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Table C-21. Vector Operations Instructions (Sheet 3 of 33)
Instruction
and Version
Vector Add / Subtract
Dreg = Dreg +|– Dreg
Vector Add / Subtract
Dreg = Dreg +|– Dreg (S)
Vector Add / Subtract
Dreg = Dreg +|– Dreg (CO)
Vector Add / Subtract
Dreg = Dreg +|– Dreg (SC0)
Vector Add / Subtract
Dreg = Dreg –|– Dreg
Vector Add / Subtract
Dreg = Dreg –|– Dreg (S)
Vector Add / Subtract
Dreg = Dreg –|– Dreg (CO)
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 0
0xC400 4000—
0xC400 4E3F
0 1 0 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 0
0xC400 6000—
0xC400 6E3F
0 1 1 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 0
0xC400 5000—
0xC400 5E3F
0 1 0 1
1 1 0 0 0 1 0 x x x 0 0 0 0 0 0
0xC400 7000—
0xC400 7E3F
0 1 1 1
1 1 0 0 0 1 0 x x x 0 0 0 0 0 0
0xC400 C000—
0xC400 CE3F
1 1 0 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 0
0xC400 E000—
0xC400 EE3F
1 1 1 0
1 1 0 0 0 1 0 x x x 0 0 0 0 0 0
0xC400 D000—
0xC400 DE3F
1 1 0 1
Instruction Opcodes
Bin
Dest
Source 0
Dreg #
0 0 0
Dreg #
Dest
Source 0
Dreg #
0 0 0
Dreg #
Dest
Source 0
Dreg #
0 0 0
Dreg #
Dest
Source 0
Dreg #
0 0 0
Dreg #
Dest
Source 0
Dreg #
0 0 0
Dreg #
Dest
Source 0
Dreg #
0 0 0
Dreg #
Dest
Source 0
Dreg #
0 0 0
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
C-109
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