Analog Devices ADSP-BF53x Blackfin Reference page 882

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Arithmetic Operations Instructions
Table C-17. Arithmetic Operations Instructions (Sheet 28 of 44)
Instruction
and Version
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (ISS2)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (IH)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (M)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (FU, M)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (IS, M)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (IU, M)
Multiply and Multiply-Accumulate
to Half Register
Dreg_hi = (A1 += Dreg_lo_hi * Dreg_lo_hi) (T, M)
C-82
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0xC125 1800—
1 1 0 0 0 0 0 1 0 0 1 0 0 1 0 1
0xC125 D9FF
Dreg
half
0xC165 1800—
1 1 0 0 0 0 0 1 0 1 1 0 0 1 0 1
0xC165 D9FF
Dreg
half
0xC015 1800—
1 1 0 0 0 0 0 0 0 0 0 1 0 1 0 1
0xC015 D9FF
Dreg
half
0xC095 1800—
1 1 0 0 0 0 0 0 1 0 0 1 0 1 0 1
0xC095 D9FF
Dreg
half
0xC115 1800—
1 1 0 0 0 0 0 1 0 0 0 1 0 1 0 1
0xC115 D9FF
Dreg
half
0xC195 1800—
1 1 0 0 0 0 0 1 1 0 0 1 0 1 0 1
0xC195 D9FF
Dreg
half
0xC055 1800—
1 1 0 0 0 0 0 0 0 1 0 1 0 1 0 1
0xC055 D9FF
Dreg
half
Bin
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
0 1 1 0 0 Dest.
Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #
src_reg_
src_reg_
0 Dreg #
1 Dreg #

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