Analog Devices ADSP-BF53x Blackfin Reference page 912

Vector Operations Instructions
Table C-21. Vector Operations Instructions (Sheet 6 of 33)
Instruction
and Version
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (ASR)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (ASL)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (S)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (S, ASR)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (S, ASL)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (CO)
Vector Add / Subtract
Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (CO, ASR)
C-112 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode
Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 0 0 0 1 0 x x x 1 0 0 0 0 1
0xC421 8000—
0xC421 8FFF
1 0 0 0
1 1 0 0 0 1 0 x x x 1 0 0 0 0 1
0xC421 C000—
0xC421 CFFF
1 1 0 0
1 1 0 0 0 1 0 x x x 1 0 0 0 0 1
0xC421 2000—
0xC421 2FFF
0 0 1 0
1 1 0 0 0 1 0 x x x 1 0 0 0 0 1
0xC421 A000—
0xC421 AFFF
1 0 1 0
1 1 0 0 0 1 0 x x x 1 0 0 0 0 1
0xC421 E000—
0xC421 EFFF
1 1 1 0
1 1 0 0 0 1 0 x x x 1 0 0 0 0 1
0xC421 1000—
0xC421 1FFF
0 0 0 1
1 1 0 0 0 1 0 x x x 1 0 0 0 0 1
0xC421 9000—
0xC421 9FFF
1 0 0 1
Bin
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Dest 1 Dest 0 Source 0
Dreg # Dreg # Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #
Source 1
Dreg #