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"Example Code for an Exception Handler" on page 4-68
principle to handle an exception with normal interrupt priority level.
Nesting of Interrupts
Interrupts are handled either with or without nesting, individually. For
more information, see
Non-nested Interrupts
If interrupts do not require nesting, all interrupts are disabled during the
interrupt service routine. Note, however, that emulation, NMI, and
exceptions are still accepted by the system.
When the system does not need to support nested interrupts, there is no
need to store the return address held in
machine state used in the interrupt service routine must be saved in the
Supervisor stack. To return from a non-nested interrupt service routine,
only the
instruction must be executed, because the return address is
RTI
already held in the
Figure 4-8
shows an example of interrupt handling where interrupts are
globally disabled for the entire interrupt service routine.
Nested Interrupts
If interrupts require nesting, the return address to the interrupted point in
the original interrupt service routine must be explicitly saved and subse-
quently restored when execution of the nested interrupt service routine
has completed. The first instruction in an interrupt service routine that
supports nesting must save the return address currently held in
pushing it onto the Supervisor stack (
bal interrupt disable bit
that are modified by the interrupt service routine are saved onto the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
"Return Registers and Instructions" on page
register.
RETI
, enabling interrupts. Next, all registers
IPEND[4]
Program Sequencer
. Only the portion of the
RETI
). This clears the glo-
[--SP] = RETI
uses the same
4-42.
by
RETI
4-51
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